特性 Feature
- 高密度架构,采用16K LE
- High-density architecture with 16K LEs
- 最高可达504Kbit的内存空间
- Up to 504Kbits of RAM space
- 最多可配置56个18×18位嵌入式乘法器,每个可配置为两个独立的9×9位乘法器
- Up to 56 18 x 18-bit embedded multipliers are each configurable as two independent 9 x 9-bit multipliers
- 每设备提供4个PLL,实现时钟倍增和相位偏移
- Provides 4 PLLs per device provide clock multiplication and phase shifting
- 支持高速差分输入输出标准,包括LVDS、RSDS、mini-LVDS、LVPECL
- High-speed differential I/O standard support, including LVDS, RSDS, mini-LVDS, LVPECL
- SSTL、SSTL-II IO 标准,支持 DDR、DDR2
- SSTL, SSTL-II IO standard, support DDR, DDR2
- 单端I/O标准支持,包括3.3V、2.5V、1.8V和1.5V LVCMOS和LVTTL
- Single-ended I/O standard support, including 3.3V, 2.5V, 1.8V, and 1.5V LVCMOS and LVTTL
- 通用套装选项,LQFP-144和 FBGA-256
- General package options, LQFP-144 and FBGA-256
- 两个12位SarADC(嵌入式温度传感器)
- Two 12-bits SarADC (embedded temp sensor)
- 通过JTAG和SPI接口实现灵活设备配置
- Flexible device configuration through JTAG and SPI interface
- 支持远程更新,类似“双重启动”实现
- Support remote update, by "dual-boot" like implementation
- 芯片信号调试支持
- Support on chip signal debugging
PDF
AG16K_Rev1_0
1 MB